Verilog Mod-N Counter

Mod-N Counter is a digital sequential circuit that counts from zero to the value N-1, i.e. total N values.

Once the counter counts the N-1 value, it is again reset to ‘0’.

The Verilog codes are programmed and simulated using EDA playground and/or Mentor Graphics Model Sim and/or Xilinx Vivado.

Tutorials for how to use HDL programming and Simulation tools.

Programs:

Design

module mod_n_counter(clk, rst, q_out);
 
	parameter WIDTH = 4;
	parameter N = 10;
	input clk, rst;
	output [WIDTH-1:0] q_out;
	reg [WIDTH-1:0] temp;
 
	always @ (posedge clk or posedge rst)
	begin
	
		if(rst)
			temp <= 0; //Reset
		else begin
			if(temp == N-1)
				temp <= 0;
			else
				temp <= temp + 1;
		end
	end
	assign q_out = temp;
	
endmodule

Testbench

module tb_mod_n_counter;

	parameter WIDTH = 4;
	parameter N = 10;
	reg clk, rst;
	wire [WIDTH-1:0] q_out;

	mod_n_counter #(.WIDTH(WIDTH), .N(N)) //Overriding WIDTH in design module
			dut (clk, rst, q_out);

	initial begin
		clk = 0;
		forever begin
			#5; clk = ~clk;
		end
	end

	initial begin
		rst = 1;
		#10; rst = 0;
		#120; $finish;
	end
endmodule

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